Sale!

JEDEC JESD22-B112A

$37.00

PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATURE
standard by JEDEC Solid State Technology Association, 10/01/2009

Category:

Description

The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation.

Product Details

Published:
10/01/2009
Number of Pages:
30
File Size:
1 file , 1 MB