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JEDEC JEP126

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GUIDELINE FOR DEVELOPING AND DOCUMENTING PACKAGE ELECTRICAL MODELS DERIVED FROM COMPUTATIONAL ANALYSIS
standard by JEDEC Solid State Technology Association, 05/01/1996

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Description

This publication provides a guideline to suppliers of IC components with a template for documenting the numerical simulation assumptions. In addition this guideline also suggests a model environment to reference when comparing various packages or component suppliers. This publication should improve the communication between the package model suppliers. This publication should improve the communication between the package model supplier and the end user.

Product Details

Published:
05/01/1996
Number of Pages:
8
File Size:
1 file , 240 KB